1. Field of the Invention
This invention relates to digital counters and more specifically to a high speed digital counter which may be tested quickly and easily.
2. Description of Related Art
Digital counters are used in a variety of applications ranging from signal communications to digital processing systems and may be the most widely used component in electronic products. Basically, a digital counter receives at its input an incrementing signal. Each time this signal is received along with a clock signal, the counter increments its output by one. Thus, the counter keeps a count of the number of times the incrementing signal has occurred.
In a number of applications, such as when the incrementing signal has a high frequency, the counter's ability to increment at high speed becomes crucial. In these applications, a carry-look-ahead circuit is usually implemented to accommodate the high speed operation. However, as the size of the counter increases, the use of a carry-look-ahead circuit becomes both physically and economically infeasible. As a compromise between performance and practicality, a number of high count, high speed counters have been implemented by chaining together a plurality of multi-bit subcounters each of which utilizes an internal carry-look-ahead circuit. The carry over from each subcounter is propagated to the next more significant subcounter by way of a carry-ripple-adder input. Prior art counters of this type (chain counters) implement the carry over between the subcounters internally. Thus, the only point of access to the counter is the input port of the counter.
This limited access presents a significant problem when testing the counter. Since the individual subcounters cannot be accessed, the counter must be tested as a whole, which means that incrementing signals must be sent to the input of the counter to cause it to go through its entire count capacity. In a counter having ten bits, for example, it is necessary to send 2.sup.10 incrementing signals to the counter to fully test it. This method of testing is inefficient and undesirably time consuming. Also, because the subcounters cannot be tested individually, it is difficult to precisely pinpoint which subcounter is malfunctioning. As a result, even if only one subcounter is malfunctioning, it is still necessary to replace the counter because the individual subcounter that should be replaced cannot be determined. A counter that allows the malfunctioning subcounter to be identified is clearly more desirable. Therefore, there is a need for an improved high speed digital counter that can be readily tested.